Cadence reported Q2 2026 results yesterday.
My expectations going in were better than they have been for most other EDA names, because unlike companies where the market can reasonably argue about near-term demand visibility, Cadence operates a business where the backlog tends to do the talking before management even starts the conference call. And the backlog has been doing a lot of talking lately.
The numbers themselves were excellent:
$1.584 billion in revenue, up 24% YoY,
non-GAAP EPS of $2.39, up 27.8% YoY, beating the high end of guidance by about $0.10.
Full-year guidance was raised for the 2nd time this year. This was, by any reasonable measure, a beat-and-raise of the highest order.
But predictably, given where sentiment sits on EDA software right now, none of that was the market’s focus story. The actual story (at least for those trying to find a reason to be bearish) was whether AI destroys Cadence’s business model or strengthens it.
Given the results, I’d say that question has been answered clearly. I’ll explain why below.
Financials
Note: Chart below as shared from 🔗 SemiAnalysis Source
The Bear Thesis : Behold, You Fool! Kimi is Coming
The primary overhang weighing on EDA software stocks in recent months has been what I’d call the “LLM disintermediation” fear.
The argument goes something like this: if you can prompt a powerful AI model to write chip design code directly, why do you need Cadence’s expensive commercial software at all? Some people have pointed to a recent demonstration by Kimi (where AI apparently “designed a chip”9 as early validation of this thesis.
I don’t think the tech underlying this fear is as threatening as it’s been portrayed, and Cadence’s CEO laid out the reason rather clearly on the call:
“This latest news... in case of Kimi doing that, I mean, they said a chip, but I think it’s a small block, which is about technology which is like 20 years old on frequency that is 20, 30 times slower than current frequency. So even to design a small block at such an old node, they needed EDA tools to do that. So this is going to happen again and again... to really do real designs, people use Cadence to do that.” — CEO, Anirudh Devgan
What Devgan is getting at is that LLMs cannot operate in a vacuum when it comes to chip design. They sit on top of physically accurate, deterministic simulation engines, the “ground-truth” layer that actually enforces the laws of physics.
Cadence owns that layer. An LLM can’t “vibe-design” a working chip into existence; it has to call upon base EDA infrastructure to validate every step of the design. And that infrastructure is Cadence’s.
The thing is that this fact actually inverts the bear thesis. When Cadence opens its APIs and PDKs to agentic AI workflows, those agents run 10x to 100x more simulations than a human engineer would. Every additional simulation is an additional billing event. More agents consuming more simulations means higher consumption of Cadence’s underlying software, which translates directly into more license revenue. This is why Devgan described agentic AI as a “demand accelerator” rather than a threat:
“Agentic AI is a demand accelerator for Cadence, as autonomous agents expand the design exploration space and call our underlying physically accurate engines more often, creating a durable tailwind that represents a significant long-term TAM expansion opportunity.”
In my view, this is one of the cleaner cases I’ve seen of a software company with real moat depth in an AI era. I explained this thesis before in this article published a few months ago: 🔗 Software Darwinism 3.0
The market has been cautiously treating AI as an existential question for EDA. Behold, you fool! Kimi K3 is coming 😱… In the meantime, the financials keep pointing in the opposite direction.
The Backlog
Here’s where the numbers get interesting. Cadence’s revenue is supported by a 3-year contract renewal cycle, which means activity and bookings tend to cluster around specific years. By management’s own admission, 2026 is a “low renewal” year in that cycle:
“This year is, you know, probably one of the low years when you look at the kind of a three-year cycle on renewals. This year is kind of probably one of the lower of the three years. But we’re seeing very good strength in add-on opportunities...” — John Wall, CFO
So against that backdrop, now consider what happened to the backlog:
It grew to $8.1 billion, up 27% YoY,
while committed RPO (the portion expected to be recognized within the next 12 months) reached $4.2 billion, up 35% YoY.
That $4.2 billion in cRPO alone covers 67% of the full-year revenue midpoint.
Not bad for a low-renewal period. And, to achieve this kind of growth in this low-renewal period means customers are not simply renewing base contracts, but actively buying additional software, the AI add-on licenses management has been talking about for several quarters.
This is being converted into hard backlog commitments, and at an accelerating rate. I don’t think quarterly backlog prints tend to get that much attention for Cadence the way they do for other software companies, but when the pace of add-on buying exceeds the base renewal cycle, that’s worth paying attention to.
The Intel Deal: Thank you, Lip-Bu Tan
One thing I’ve been watching with Cadence is its relationship with Intel (and his former CEO, Lip-Bu Tan, now Intel’s CEO).
The company has historically dominated at TSMC, but its historical footprint at Intel has been a legitimate weak spot. Devgan said this during the call:
“I’m very proud of this new Intel collaboration because Intel is a company we tried to work closer for a very long time. I mean, this is not a one or two-year-old problem. This is like a 10 or 20-year-old problem... And you’ll see that we are engaging Intel in all parts of Intel with all parts of our product portfolio.”
Looks like Lip-Bu Tan's long-standing ties to Cadence are starting to bear fruit.
The agreement covers IP, EDA, and design technology co-optimization for Intel’s HPC and mobile roadmap. This matters for a few reasons:
First, Design Technology Co-Optimization (DTCO) agreements tend to be long-duration, technically entrenched, and very difficult to unwind once the workflow is embedded.
Second, Intel’s foundry ambitions (whatever one thinks of their execution track record) represent a meaningful amount of future wafer starts that Cadence was only partially positioned to capture. That exposure is now significantly broader.
I’ll be honest, I’m not going to pretend I know exactly how much revenue this eventually generates. Intel’s roadmap has surprised on the downside often enough that modeling it precisely feels like guesswork. But I do think the directional signal here is positive, and closing a 20-year gap with a customer of Intel’s strategic importance is not something to gloss over in a quarterly summary.
Thank you Lip-Bu Tan, Cadence remembers.
What’s the Revenue Mix Telling Us?
Cadence’s three revenue segments all grew at a very healthy clip in Q2, and what’s important to note is that they’re growing for structurally different reasons that happen to be converging at the same time:
Core EDA ($1.08 billion, +15% YoY): The engine driving this is the rise in analog and mixed-signal design complexity driven by AI inferencing workloads. Memory architectures are diversifying rapidly (HBM, CXL, SRAM offload) and each new architecture requires custom analog design. Cadence’s Virtuoso platform is the dominant tool here and complexity is its friend.
System Design & Analysis ($269 million, +22% YoY): As the industry moves from monolithic chips to chiplets and 3D-IC packaging, the design complexity migrates upward into the package level. Cadence’s packaging and PCB tools are the right product in the right place at the right time.
Semiconductor IP ($238 million, +40%+ YoY): This was the standout segment. Cadence’s IP business had its best quarter ever, driven by demand for interface IP (PCIe, UCIe, HBM, LPDDR6) that handles the massive data movement requirements of AI workloads. When customers need to source IP blocks rather than design them from scratch, Cadence increasingly looks like the first call.
Put all of these together and you get a company whose three revenue lines are being lifted by three distinct tailwinds, i.e. AI system complexity, packaging proliferation, and interface IP demand, that are all ultimately rooted in the same macro driver. That kind of coherence in a revenue mix is not something I take for granted.
And there’s another structural tailwind playing out in Cadence’s favor that was highlighted on a recent Goldman Sacks Global investment research report on chip design and EDA tools :
"The semi industry has a long-standing labor problem, with the world producing new chip designers at just 2-3%/yr (yielding ~255k engineers by 2030) relative to the 325k design engineers we estimate the industry will require to service surging AI-driven demand" — quote shared by 🔗 WTCM on X.
The “human chip designers bottleneck” could be the perfect catalyst for Cadence’s AI-driven EDA tools, and the impact on AI-related revenue might only just getting started to show up in the company’s financials.
Last, one word on China.
Its contribution came in at $238 million (15% of CDNS revenue), roughly doubling YoY from the trough in Q2 2025. This is a number I’ll be watching carefully for geopolitical noise going forward. Management explicitly noted that their guidance assumes export control regulations “remain substantially similar” to today. I’m not going to catastrophize this, because domestic Chinese demand for mature-node design is real and serves a large industrial base. But my answer is that this is a variable I can’t model with any confidence (and I don’t think anybody can).
What about Margins and the Q3 Dip?
Full-year non-GAAP operating margins were guided to 43.75% - 44.75%, and Q3 is expected to come in slightly below the first half’s pace. Management was clear about why:
“You’ll notice that the second half is kind of slightly lower margins than the first half, but that’s the reflection of us making targeted investments. These are deliberate investments and not a deterioration of the underlying model by any means... we expect kind of acquisition profitability and profitability of IP to continue to improve as we go into 2027.” — John Wall, CFO
So, these “investments” are principally tied to integrating the Hexagon Design & Engineering acquisition and ramping engineering resources to support the Intel partnership.
While I am not here to deny that integration risk exists (it always does), I think it’s worth distinguishing between margin compression from structural business deterioration and margin compression from deliberate investment into a business that just signed a multi-year agreement with one of the world’s largest semiconductor companies. These are different things, and I don’t think the market should treat them the same way.
The 2026 Guidance Picture
FY revenue guidance was raised to $6.26 - $6.34 billion, implying approximately 19% YoY growth. Non-GAAP EPS guidance was raised to $8.05 - $8.15, up from $7.85 - $7.95 previously.
This is the second guidance raise this year, in a low-renewal period, with a major integration underway.
For a company with $8.1 billion in backlog, a 3-year revenue visibility structure, and a product that is becoming more heavily consumed as AI agent workflows proliferate, the quality of the earnings stream is arguably high.
The DCF question, i.e. what growth rate must be “baked in” to justify the current valuation, is the right frame. At the current revenue trajectory and margin profile, the answer is probably not a stretch. You can check the results of my DCF assumptions for CDNS here, inside the 🔗 Portfolio Corner.
What this Q validated (and What it Didn’t)
In the spirit of keeping score:
Open-source AI as an EDA moat destroyer → thesis got weaker, not stronger. The Kimi K3 fear was surfaced and contextualized by management, and the actual mechanism (LLMs requiring base EDA infrastructure) works in Cadence’s favor.
Agentic AI as a demand multiplier → no longer a speculative thesis. The 55% H1 bookings growth in a low-renewal year is direct evidence of customers buying AI add-on licenses at scale.
Intel as a structurally open account → now officially closed. A multi-year, multi-product agreement across IP, EDA, and DTCO is about as comprehensive a partnership as you can sign. Thank you, Lip-Bu Tan.
China exposure as a binary risk → this remains the uncertainty in the model. I don’t think current export controls are going anywhere tomorrow, but I also can’t rule it out.
With $8.1 billion on the books during a low-renewal quarter, the backlog doesn’t lie.
Thank you for following along,
—Nikotes
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🔗 Portfolio Corner - 🗓️ Monthly Updates (Last Update: 28-Jul-2026)
